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MSP430FR57xx FRAM Microcontrollers Slide 21

The biggest improvement in this USCI module is in the I2C configuration. With the I2C protocol, the MSP430FR57xx devices can now support multi-slave addressing, hardware clock low timeout for SM Bus compatibility, an integrated byte counter for custom message parsing, automatic stop assertion across the bus, a pre-load buffer for a master or slave transmitter, address bit masking, selectable de-glitch timing, and acknowledge/not acknowledge capability in software for increased network robustness. All of these make a powerful and flexible I2C module that is much easier to use and configure.

PTM Published on: 2012-04-19